80 porta(this,
"A", true),
81 portb(this,
"B", true),
82 portc(this,
"C", true, 7),
83 portd(this,
"D", true),
84 porte(this,
"E", true),
85 portf(this,
"F", true),
86 portg(this,
"G", true),
87 gtccr_reg(&coreTraceGroup,
"GTCCR"),
88 assr_reg(&coreTraceGroup,
"ASSR"),
89 prescaler013(this,
"01", >ccr_reg, 0, 7),
90 prescaler2(this,
"2",
PinAtPort(&portc, 7), &assr_reg, 5, >ccr_reg, 1, 7),
91 premux0(&prescaler013,
PinAtPort(&portd, 7)),
92 premux1(&prescaler013),
94 premux3(&prescaler013,
PinAtPort(&porte, 6)) {
97 if(flash_bytes > 64U * 1024U) {
101 if(flash_bytes > 32U * 1024U) {
144 timerIrq1->registerLine(0,
IRQLine(
"TOV1", 15));
145 timerIrq1->registerLine(1,
IRQLine(
"OCF1A", 12));
146 timerIrq1->registerLine(2,
IRQLine(
"OCF1B", 13));
147 timerIrq1->registerLine(3,
IRQLine(
"OCF1C", 14));
148 timerIrq1->registerLine(5,
IRQLine(
"ICF1", 11));
154 timerIrq1->getLine(
"TOV1"),
155 timerIrq1->getLine(
"OCF1A"),
157 timerIrq1->getLine(
"OCF1B"),
159 timerIrq1->getLine(
"OCF1C"),
161 timerIrq1->getLine(
"ICF1"),
165 timerIrq2->registerLine(0,
IRQLine(
"TOV2", 10));
166 timerIrq2->registerLine(1,
IRQLine(
"OCF2A", 9));
171 timerIrq2->getLine(
"TOV2"),
172 timerIrq2->getLine(
"OCF2A"),
176 timerIrq3->registerLine(0,
IRQLine(
"TOV3", 31));
177 timerIrq3->registerLine(1,
IRQLine(
"OCF3A", 28));
178 timerIrq3->registerLine(2,
IRQLine(
"OCF3B", 29));
179 timerIrq3->registerLine(3,
IRQLine(
"OCF3C", 30));
180 timerIrq3->registerLine(5,
IRQLine(
"ICF3", 27));
186 timerIrq3->getLine(
"TOV3"),
187 timerIrq3->getLine(
"OCF3A"),
189 timerIrq3->getLine(
"OCF3B"),
191 timerIrq3->getLine(
"OCF3C"),
193 timerIrq3->getLine(
"ICF3"),
310 rw[0x70]= & timerIrq2->timsk_reg;
311 rw[0x6F]= & timerIrq1->timsk_reg;
357 rw[0x38]= & timerIrq3->tifr_reg;
358 rw[0x37]= & timerIrq2->tifr_reg;
359 rw[0x36]= & timerIrq1->tifr_reg;
ADC reference is selected on 3 or 4 different sources: Vcc, aref pin, bandgap or 2.56V reference.
HWUsart * usart1
usart 1 unit
GPIORegister * gpior0_reg
Basic AVR device, contains the core functionality.
0:aref, 1:vcc, 2:-, 3:2.56V
AVR device class for AT90CAN64, see AvrDevice_at90canbase.
IOReg< HWTimer16 > ocrc_h_reg
output compare C register, high byte
PrescalerMultiplexer premux1
prescaler multiplexer for timer 0
PrescalerMultiplexer premux2
prescaler multiplexer for timer 0
AddressExtensionRegister * rampz
RAMPZ address extension register.
AVR device class for AT90CAN32, see AvrDevice_at90canbase.
AVR device class for AT90CAN128, see AvrDevice_at90canbase.
Implements a stack with stack register using RAM as stackarea.
IOReg< HWUart > ubrrhi_reg
IO register "UBRRxH" - baudrate.
IOReg< HWEeprom > eedr_reg
IOReg< HWTimer8_1C > tccr_reg
control register
void registerIrq(int vector, int irqBit, ExternalIRQ *extirq)
IOReg< HWTimer16 > ocra_h_reg
output compare A register, high byte
Implement CLKPR register.
IOSpecialReg gtccr_reg
GTCCR IO register.
Pin & GetPin(unsigned char pinNo)
returns a pin reference of pin with pin number
Timer unit with 8Bit counter and one output compare unit.
IOReg< HWTimer16 > ocra_l_reg
output compare A register, low byte
IOReg< HWAcomp > acsr_reg
ACSR IO register.
IOReg< HWTimer8 > tcnt_reg
counter register
A register in IO register space unrelated to any peripheral. "GPIORx" in datasheets.
IOReg< HWTimer16 > tcnt_h_reg
counter register, high byte
CLKPRRegister * clkpr_reg
CLKPR IO register.
PrescalerMultiplexerExt premux0
prescaler multiplexer for timer 0
Handler for external IRQ's to communicate with IRQ system and mask/flag registers.
IOReg< HWTimer16 > ocrc_l_reg
output compare C register, low byte
Represents a timer interrupt line, Frontend for timer interrupts.
PrescalerMultiplexerExt premux3
prescaler multiplexer for timer 0
void SetFuseConfiguration(int size, unsigned long defvalue)
Configure fuses.
HWUsart * usart0
usart 0 unit
IOReg< AddressExtensionRegister > ext_reg
IOReg< HWUart > ubrr_reg
IO register "UBRRxL" - baudrate.
IOSpecialReg tifr_reg
the TIFRx register
ExternalIRQHandler * extirq01
external interrupt support for INT0, INT1, INT2, INT3, INT4, INT5, INT6, INT7
Implements the I/O hardware necessary to do USART transfers.
IOSpecialReg * eimsk_reg
EIMSK IO register.
IOReg< HWUart > ucsra_reg
IOReg< HWTimer16 > icr_h_reg
input capture register, high byte
OSCCALRegister * osccal_reg
OSCCAL IO register.
GPIORegister * gpior1_reg
ICaptureSource * inputCapture3
input capture source for timer3
TimerIRQRegister * timerIrq3
timer interrupt unit for timer 3
TraceValueCoreRegister coreTraceGroup
IOReg< HWUart > ucsrb_reg
IOReg< HWTimer16 > icr_l_reg
input capture register, low byte
HWTimer8_1C * timer2
timer 2 unit
IOReg< HWEeprom > eearh_reg
IOReg< HWTimer16_3C > tccra_reg
control register A
IOReg< HWTimer16 > tcnt_l_reg
counter register, low byte
IOSpecialReg * eicrb_reg
EICRA IO register.
Pin * GetPin(const char *name)
IOReg< HWTimer16_3C > tccrc_reg
control register C
IOReg< HWTimer16 > ocrb_l_reg
output compare B register, low byte
Timer unit with 16Bit counter and 3 output compare units.
TimerIRQRegister * timerIrq0
timer interrupt unit for timer 0
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
ADC type M164: ADC on atmega164/324/644/1284 and at90can32/64/128.
IOReg< HWEeprom > eecr_reg
void registerLine(int idx, IRQLine *irq)
#define AVR_REGISTER(name, class)
RWMemoryMember ** rw
The whole memory: R0-R31, IO, Internal RAM.
TimerIRQRegister * timerIrq2
timer interrupt unit for timer 2
oscillator version 4.x, 7bit, one range
Provides the programming engine for flash self programming.
IOSpecialReg * eicra_reg
EICRA IO register.
void SetBootloaderConfig(unsigned addr, int size, int bPosBOOTSZ, int bPosBOOTRST)
Set bootloader support configuration.
IOReg< HWTimer16 > ocrb_h_reg
output compare B register, high byte
HWAcomp * acomp
analog compare unit
IOReg< HWEeprom > eearl_reg
HWTimer8_1C * timer0
timer 0 unit
HWAdmux * admux
adc multiplexer unit
IOReg< HWTimer8 > ocra_reg
output compare A register
static NotSimulatedRegister * getRegister(int reg)
Class, which provides input capture source for 16bit timers.
RWSreg * statusRegister
the memory interface for status
IOReg< HWTimer16_3C > tccrb_reg
control register B
HWARef * aref
adc reference unit
IRQLine * getLine(const std::string &name)
IOSpecialReg * eifr_reg
EIFR IO register.
TimerIRQRegister * timerIrq1
timer interrupt unit for timer 1
AvrDevice_at90canbase(unsigned ram_bytes, unsigned flash_bytes, unsigned ee_bytes)
FlashProgramming * spmRegister
ICaptureSource * inputCapture1
input capture source for timer1
HWTimer16_3C * timer1
timer 1 unit
IOReg< HWWado > wdtcr_reg
IOReg< HWUsart > ucsrc_reg
IOSpecialReg timsk_reg
the TIMSKx register
GPIORegister * gpior2_reg
HWTimer16_3C * timer3
timer 3 unit
Analog comparator peripheral.
IOReg< FlashProgramming > spmcr_reg
Implement OSCCAL register.
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.
bool flagELPMInstructions
ELPM instructions are available (only on devices with bigger flash)
IOSpecialReg assr_reg
ASSR IO register.