44 ocr1b(portx.GetPin(0)),
45 prescaler(this, "01"),
46 premux0(&prescaler,
PinAtPort(&portb, 0)),
49 flagJMPInstructions =
false;
50 flagMULInstructions =
false;
51 flagMOVWInstruction =
false;
52 fuses->SetFuseConfiguration(2, 0xdf);
62 spi=
new HWSpi(
this, irqSystem,
PinAtPort(&portb, 5),
PinAtPort(&portb, 6),
PinAtPort(&portb, 7),
PinAtPort(&portb, 4), 8,
false);
69 timer01irq->registerLine(1,
IRQLine(
"TOV0", 7));
70 timer01irq->registerLine(3,
IRQLine(
"ICF1", 3));
71 timer01irq->registerLine(5,
IRQLine(
"OCF1B", 5));
72 timer01irq->registerLine(6,
IRQLine(
"OCF1A", 4));
73 timer01irq->registerLine(7,
IRQLine(
"TOV1", 6));
77 timer01irq->getLine(
"TOV0"));
82 timer01irq->getLine(
"TOV1"),
83 timer01irq->getLine(
"OCF1A"),
85 timer01irq->getLine(
"OCF1B"),
87 timer01irq->getLine(
"ICF1"),
92 acomp =
new HWAcomp(
this, irqSystem,
PinAtPort(&portb,2),
PinAtPort(&portb, 3), 12, NULL, timer1, NULL, NULL,
false);
98 extirq->registerIrq(1, 6,
new ExternalIRQSingle(mcucr_reg, 0, 2, GetPin(
"D2"),
true));
99 extirq->registerIrq(2, 7,
new ExternalIRQSingle(mcucr_reg, 2, 2, GetPin(
"D3"),
true));
101 rw[0x5f]= statusRegister;
107 rw[0x59]= & timer01irq->timsk_reg;
108 rw[0x58]= & timer01irq->tifr_reg;
112 rw[0x53]= & timer0->tccr_reg;
113 rw[0x52]= & timer0->tcnt_reg;
115 rw[0x4f]= & timer1->tccra_reg;
116 rw[0x4e]= & timer1->tccrb_reg;
117 rw[0x4d]= & timer1->tcnt_h_reg;
118 rw[0x4c]= & timer1->tcnt_l_reg;
119 rw[0x4b]= & timer1->ocra_h_reg;
120 rw[0x4a]= & timer1->ocra_l_reg;
121 rw[0x49]= & timer1->ocrb_h_reg;
122 rw[0x48]= & timer1->ocrb_l_reg;
124 rw[0x45]= & timer1->icr_h_reg;
125 rw[0x44]= & timer1->icr_l_reg;
127 rw[0x41]= & wado->wdtcr_reg;
129 rw[0x3f]= & eeprom->eearh_reg;
130 rw[0x3e]= & eeprom->eearl_reg;
131 rw[0x3d]= & eeprom->eedr_reg;
132 rw[0x3c]= & eeprom->eecr_reg;
134 rw[0x3b]= & porta.port_reg;
135 rw[0x3a]= & porta.ddr_reg;
136 rw[0x39]= & porta.pin_reg;
138 rw[0x38]= & portb.port_reg;
139 rw[0x37]= & portb.ddr_reg;
140 rw[0x36]= & portb.pin_reg;
142 rw[0x35]= & portc.port_reg;
143 rw[0x34]= & portc.ddr_reg;
144 rw[0x33]= & portc.pin_reg;
146 rw[0x32]= & portd.port_reg;
147 rw[0x31]= & portd.ddr_reg;
148 rw[0x30]= & portd.pin_reg;
150 rw[0x2f]= & spi->spdr_reg;
151 rw[0x2e]= & spi->spsr_reg;
152 rw[0x2d]= & spi->spcr_reg;
154 rw[0x2c]= & uart->udr_reg;
155 rw[0x2b]= & uart->usr_reg;
156 rw[0x2a]= & uart->ucr_reg;
157 rw[0x29]= & uart->ubrr_reg;
159 rw[0x28]= & acomp->acsr_reg;
Basic AVR device, contains the core functionality.
HWTimer16_2C2 * timer1
timer 1 unit
AVRDevice class for AT90S8515.
Implements a stack with stack register using RAM as stackarea.
IOSpecialReg * gimsk_reg
GIMSK IO register.
ExternalIRQHandler * extirq
external interrupt support
IOSpecialReg * mcucr_reg
MCUCR IO register.
Handler for external IRQ's to communicate with IRQ system and mask/flag registers.
Represents a timer interrupt line, Frontend for timer interrupts.
IOSpecialReg * gifr_reg
GIFR IO register.
TimerIRQRegister * timer01irq
timer interrupt unit for timer
HWTimer8_0C * timer0
timer 0 unit
Timer unit with 16Bit counter and 2 output compare units and 2 config registers.
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
#define AVR_REGISTER(name, class)
Timer unit with 8Bit counter and no output compare unit.
Class, which provides input capture source for 16bit timers.
ICaptureSource * inputCapture1
input capture source for timer1
Implements the I/O hardware necessary to do UART transfers.
Analog comparator peripheral.
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.