70 porta(this,
"A", true, 3),
71 portb(this,
"B", true),
72 portd(this,
"D", true, 7),
73 gtccr_reg(&coreTraceGroup,
"GTCCR"),
74 prescaler01(this,
"01", >ccr_reg, 0),
75 premux0(&prescaler01,
PinAtPort(&portd, 4)),
76 premux1(&prescaler01,
PinAtPort(&portd, 5))
198 rw[0x28]= & acomp->acsr_reg;
Basic AVR device, contains the core functionality.
IOReg< HWUsart > ubrrh_reg
AVRDevice class for ATTiny2313.
HWPort portd
port D (only 7 bit)
GPIORegister * gpior0_reg
GPIOR0 Register.
Implements a stack with stack register using RAM as stackarea.
OSCCALRegister * osccal_reg
OSCCAL IO register.
IOReg< HWEeprom > eedr_reg
void registerIrq(int vector, int irqBit, ExternalIRQ *extirq)
IOReg< HWTimer16 > ocra_h_reg
output compare A register, high byte
Implement CLKPR register.
PrescalerMultiplexerExt premux1
prescaler multiplexer for timer 1
bool flagJMPInstructions
CALL and JMP instructions are available (only on devices with bigger flash)
GPIORegister * gpior2_reg
GPIOR2 Register.
IOReg< HWTimer16 > ocra_l_reg
output compare A register, low byte
IOReg< HWTimer8 > tcnt_reg
counter register
CLKPRRegister * clkpr_reg
CLKPR IO register.
A register in IO register space unrelated to any peripheral. "GPIORx" in datasheets.
IOReg< HWTimer16 > tcnt_h_reg
counter register, high byte
Handler for external IRQ's to communicate with IRQ system and mask/flag registers.
Represents a timer interrupt line, Frontend for timer interrupts.
IOSpecialReg gtccr_reg
GTCCR IO register.
void SetFuseConfiguration(int size, unsigned long defvalue)
Configure fuses.
PrescalerMultiplexerExt premux0
prescaler multiplexer for timer 0
HWUsart * usart
usart unit
IOReg< HWUart > ubrr_reg
IO register "UBRRxL" - baudrate.
IOReg< HWTimer16_2C3 > tccra_reg
control register A
GPIORegister * gpior1_reg
GPIOR1 Register.
IOReg< HWTimer8_2C > tccrb_reg
control register B
IOSpecialReg tifr_reg
the TIFRx register
Implements the I/O hardware necessary to do USART transfers.
IOReg< HWTimer16_2C3 > tccrb_reg
control register B
IOReg< HWUart > ucsra_reg
ICaptureSource * inputCapture1
input capture source for timer1
IOSpecialReg * mcucr_reg
MCUCR IO register.
IOReg< HWTimer8_2C > tccra_reg
control register A
IOReg< HWTimer16 > icr_h_reg
input capture register, high byte
Timer unit with 16Bit counter and 2 output compare units, but 3 config registers. ...
TraceValueCoreRegister coreTraceGroup
IOReg< HWUart > ucsrb_reg
IOReg< HWTimer16 > icr_l_reg
input capture register, low byte
TimerIRQRegister * timer01irq
timer interrupt unit for timer 0 and 1
bool flagMULInstructions
(F)MULxx instructions are available
IOReg< HWEeprom > eearh_reg
IOReg< HWTimer16 > tcnt_l_reg
counter register, low byte
HWTimer8_2C * timer0
timer 0 unit
Pin * GetPin(const char *name)
IOReg< HWTimer16 > ocrb_l_reg
output compare B register, low byte
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
IOSpecialReg * pcmsk_reg
PCMSK IO register.
IOReg< HWEeprom > eecr_reg
IOSpecialReg * eifr_reg
EIFR IO register.
void registerLine(int idx, IRQLine *irq)
#define AVR_REGISTER(name, class)
RWMemoryMember ** rw
The whole memory: R0-R31, IO, Internal RAM.
HWTimer16_2C3 * timer1
timer 1 unit
IOSpecialReg * gimsk_reg
GIMSK IO register.
ExternalIRQHandler * extirq
external interrupt support
oscillator version 4.x, 7bit, one range
HWAcomp * acomp
analog compare unit
Provides the programming engine for flash self programming.
IOReg< HWTimer16 > ocrb_h_reg
output compare B register, high byte
IOReg< HWTimer16_2C3 > tccrc_reg
control register C
IOReg< HWEeprom > eearl_reg
IOReg< HWTimer8 > ocra_reg
output compare A register
Class, which provides input capture source for 16bit timers.
RWSreg * statusRegister
the memory interface for status
Timer unit with 8Bit counter and 2 output compare unit.
Pin-change interrupt on all pins of a port.
IRQLine * getLine(const std::string &name)
HWPort porta
port A (only 3 bit)
FlashProgramming * spmRegister
IOReg< HWTimer8 > ocrb_reg
output compare B register
IOReg< HWUsart > ucsrc_reg
IOSpecialReg timsk_reg
the TIMSKx register
Analog comparator peripheral.
IOReg< FlashProgramming > spmcr_reg
Implement OSCCAL register.
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.