simulavr  1.1.0
attiny2313.cpp
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1  /*
2  ****************************************************************************
3  *
4  * simulavr - A simulator for the Atmel AVR family of microcontrollers.
5  * Copyright (C) 2001, 2002, 2003 Klaus Rudolph
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License along
18  * with this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20  *
21  ****************************************************************************
22  *
23  * $Id$
24  */
25 
26 #include "attiny2313.h"
27 
28 #include "hardware.h"
29 #include "irqsystem.h"
30 #include "hwport.h"
31 #include "hwstack.h"
32 #include "hweeprom.h"
33 #include "hwwado.h"
34 #include "hwsreg.h"
35 #include "flashprog.h"
36 
37 #include "avrfactory.h"
38 
40 
42  delete usi;
43  delete acomp;
44  delete timer1;
45  delete inputCapture1;
46  delete timer0;
47  delete timer01irq;
48  delete usart;
49  delete extirq;
50  delete pcmsk_reg;
51  delete mcucr_reg;
52  delete eifr_reg;
53  delete gimsk_reg;
54  delete gpior2_reg;
55  delete gpior1_reg;
56  delete gpior0_reg;
57  delete spmRegister;
58  delete osccal_reg;
59  delete clkpr_reg;
60  delete stack;
61  delete eeprom;
62  delete irqSystem;
63 }
64 
66  AvrDevice(64 , // I/O space above General Purpose Registers
67  128, // RAM size
68  0, // External RAM size
69  2 * 1024), // Flash Size
70  porta(this, "A", true, 3),
71  portb(this, "B", true),
72  portd(this, "D", true, 7),
73  gtccr_reg(&coreTraceGroup, "GTCCR"),
74  prescaler01(this, "01", &gtccr_reg, 0),
75  premux0(&prescaler01, PinAtPort(&portd, 4)),
76  premux1(&prescaler01, PinAtPort(&portd, 5))
77 {
78  flagJMPInstructions = false;
79  flagMULInstructions = false;
80  fuses->SetFuseConfiguration(17, 0xffdf64);
81  irqSystem = new HWIrqSystem(this, 2, 19); //2 bytes per vector, 19 vectors
82  eeprom = new HWEeprom(this, irqSystem, 128, 17, HWEeprom::DEVMODE_EXTENDED);
83  stack = new HWStackSram(this, 8, true);
86 
88 
89  gpior0_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR0");
90  gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1");
91  gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2");
92 
93  gimsk_reg = new IOSpecialReg(&coreTraceGroup, "GIMSK");
94  eifr_reg = new IOSpecialReg(&coreTraceGroup, "EIFR");
95  mcucr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCR");
96  pcmsk_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK");
98  extirq->registerIrq(1, 6, new ExternalIRQSingle(mcucr_reg, 0, 2, GetPin("D2")));
99  extirq->registerIrq(2, 7, new ExternalIRQSingle(mcucr_reg, 2, 2, GetPin("D3")));
101 
102  //wado = new HWWado(this);
103 
104  usart = new HWUsart(this, irqSystem,
105  PinAtPort(&portd,1), PinAtPort(&portd,0), PinAtPort(&portd, 2),
106  7, 8, 9,
107  0, false);
108 
110  timer01irq->registerLine(0, IRQLine("OCF0A", 13));
111  timer01irq->registerLine(1, IRQLine("TOV0", 6));
112  timer01irq->registerLine(2, IRQLine("OCF0B", 14));
113  timer01irq->registerLine(3, IRQLine("ICF1", 3));
114  timer01irq->registerLine(5, IRQLine("OCF1B", 12));
115  timer01irq->registerLine(6, IRQLine("OCF1A", 4));
116  timer01irq->registerLine(7, IRQLine("TOV1", 5));
117 
118  timer0 = new HWTimer8_2C(this,
119  &premux0,
120  0,
121  timer01irq->getLine("TOV0"),
122  timer01irq->getLine("OCF0A"),
123  PinAtPort(&portb, 2),
124  timer01irq->getLine("OCF0B"),
125  PinAtPort(&portd, 5));
127  timer1 = new HWTimer16_2C3(this,
128  &premux1,
129  1,
130  timer01irq->getLine("TOV1"),
131  timer01irq->getLine("OCF1A"),
132  PinAtPort(&portb, 3),
133  timer01irq->getLine("OCF1B"),
134  PinAtPort(&portb, 4),
135  timer01irq->getLine("ICF1"),
136  inputCapture1);
137 
138  acomp = new HWAcomp(this, irqSystem, PinAtPort(&portb, 0), PinAtPort(&portb, 1), 10, NULL, timer1);
139 
140  // USI
141  usi = new HWUSI(this, irqSystem, PinAtPort(&portb, 5), PinAtPort(&portb, 6), PinAtPort(&portb, 7), 15, 16);
142 
143  rw[0x5f]= statusRegister;
144  rw[0x5e]= & ((HWStackSram *)stack)->sph_reg;
145  rw[0x5d]= & ((HWStackSram *)stack)->spl_reg;
146  rw[0x5c]= & timer0->ocrb_reg;
147  rw[0x5b]= gimsk_reg;
148  rw[0x5a]= eifr_reg;
149  rw[0x59]= & timer01irq->timsk_reg;
150  rw[0x58]= & timer01irq->tifr_reg;
151  rw[0x57]= & spmRegister->spmcr_reg;
152  rw[0x56]= & timer0->ocra_reg;
153  rw[0x55]= mcucr_reg;
154  //rw[0x54] MCUSR
155  rw[0x53]= & timer0->tccrb_reg;
156  rw[0x52]= & timer0->tcnt_reg;
157  rw[0x51]= osccal_reg;
158  rw[0x50]= & timer0->tccra_reg;
159  rw[0x4f]= & timer1->tccra_reg;
160  rw[0x4e]= & timer1->tccrb_reg;
161  rw[0x4d]= & timer1->tcnt_h_reg;
162  rw[0x4c]= & timer1->tcnt_l_reg;
163  rw[0x4b]= & timer1->ocra_h_reg;
164  rw[0x4a]= & timer1->ocra_l_reg;
165  rw[0x49]= & timer1->ocrb_h_reg;
166  rw[0x48]= & timer1->ocrb_l_reg;
167  //rw[0x47] reserved
168  rw[0x46]= clkpr_reg;
169  rw[0x45]= & timer1->icr_h_reg;
170  rw[0x44]= & timer1->icr_l_reg;
171  rw[0x43]= & gtccr_reg;
172  rw[0x42]= & timer1->tccrc_reg;
173  //rw[0x41]= & wado->wdtcr_reg;
174  rw[0x40]= pcmsk_reg;
175  rw[0x3f]= & eeprom->eearh_reg; // register normally reserved, but used by avr-libc!
176  rw[0x3e]= & eeprom->eearl_reg;
177  rw[0x3d]= & eeprom->eedr_reg;
178  rw[0x3c]= & eeprom->eecr_reg;
179  rw[0x3b]= & porta.port_reg;
180  rw[0x3a]= & porta.ddr_reg;
181  rw[0x39]= & porta.pin_reg;
182  rw[0x38]= & portb.port_reg;
183  rw[0x37]= & portb.ddr_reg;
184  rw[0x36]= & portb.pin_reg;
185  rw[0x35]= gpior2_reg;
186  rw[0x34]= gpior1_reg;
187  rw[0x33]= gpior0_reg;
188  rw[0x32]= & portd.port_reg;
189  rw[0x31]= & portd.ddr_reg;
190  rw[0x30]= & portd.pin_reg;
191  rw[0x2f]= & usi->usidr_reg;
192  rw[0x2e]= & usi->usisr_reg;
193  rw[0x2d]= & usi->usicr_reg;
194  rw[0x2c]= & usart->udr_reg;
195  rw[0x2b]= & usart->ucsra_reg;
196  rw[0x2a]= & usart->ucsrb_reg;
197  rw[0x29]= & usart->ubrr_reg;
198  rw[0x28]= & acomp->acsr_reg;
199  //rw[0x27] reserved
200  //rw[0x26] reserved
201  //rw[0x25] reserved
202  //rw[0x24] reserved
203  rw[0x23]= & usart->ucsrc_reg;
204  rw[0x22]= & usart->ubrrh_reg;
205  //rw[0x21] DIDR
206  //rw[0x20] reserved
207 
208  Reset();
209 }
210 
211 /* EOF */
Basic AVR device, contains the core functionality.
Definition: avrdevice.h:66
IOReg< HWUsart > ubrrh_reg
Definition: hwuart.h:173
AVRDevice class for ATTiny2313.
Definition: attiny2313.h:41
HWPort portd
port D (only 7 bit)
Definition: attiny2313.h:46
AvrFuses * fuses
Definition: avrdevice.h:100
GPIORegister * gpior0_reg
GPIOR0 Register.
Definition: attiny2313.h:49
HWIrqSystem * irqSystem
Definition: avrdevice.h:104
IOReg< HWUSI > usicr_reg
Definition: hwusi.h:168
Implements a stack with stack register using RAM as stackarea.
Definition: hwstack.h:131
OSCCALRegister * osccal_reg
OSCCAL IO register.
Definition: attiny2313.h:53
IOReg< HWEeprom > eedr_reg
Definition: hweeprom.h:101
void registerIrq(int vector, int irqBit, ExternalIRQ *extirq)
Definition: externalirq.cpp:53
IOReg< HWTimer16 > ocra_h_reg
output compare A register, high byte
Definition: hwtimer.h:312
Implement CLKPR register.
Definition: rwmem.h:135
PrescalerMultiplexerExt premux1
prescaler multiplexer for timer 1
Definition: attiny2313.h:63
bool flagJMPInstructions
CALL and JMP instructions are available (only on devices with bigger flash)
Definition: avrdevice.h:116
GPIORegister * gpior2_reg
GPIOR2 Register.
Definition: attiny2313.h:51
IOReg< HWTimer16 > ocra_l_reg
output compare A register, low byte
Definition: hwtimer.h:313
IOReg< HWTimer8 > tcnt_reg
counter register
Definition: hwtimer.h:229
Definition: hwusi.h:41
CLKPRRegister * clkpr_reg
CLKPR IO register.
Definition: attiny2313.h:52
A register in IO register space unrelated to any peripheral. "GPIORx" in datasheets.
Definition: rwmem.h:113
IOReg< HWTimer16 > tcnt_h_reg
counter register, high byte
Definition: hwtimer.h:310
Handler for external IRQ&#39;s to communicate with IRQ system and mask/flag registers.
Definition: externalirq.h:41
Represents a timer interrupt line, Frontend for timer interrupts.
Definition: timerirq.h:42
IOSpecialReg gtccr_reg
GTCCR IO register.
Definition: attiny2313.h:48
void SetFuseConfiguration(int size, unsigned long defvalue)
Configure fuses.
Definition: flashprog.cpp:246
PrescalerMultiplexerExt premux0
prescaler multiplexer for timer 0
Definition: attiny2313.h:62
HWUsart * usart
usart unit
Definition: attiny2313.h:68
IOReg< HWUart > ubrr_reg
IO register "UBRRxL" - baudrate.
Definition: hwuart.h:136
IOReg< HWTimer16_2C3 > tccra_reg
control register A
Definition: hwtimer.h:615
GPIORegister * gpior1_reg
GPIOR1 Register.
Definition: attiny2313.h:50
IOReg< HWTimer8_2C > tccrb_reg
control register B
Definition: hwtimer.h:440
IOSpecialReg tifr_reg
the TIFRx register
Definition: timerirq.h:74
Implements the I/O hardware necessary to do USART transfers.
Definition: hwuart.h:149
IOReg< HWTimer16_2C3 > tccrb_reg
control register B
Definition: hwtimer.h:616
IOReg< HWPort > port_reg
Definition: hwport.h:84
IOReg< HWUart > ucsra_reg
Definition: hwuart.h:136
ICaptureSource * inputCapture1
input capture source for timer1
Definition: attiny2313.h:64
void Reset()
Definition: avrdevice.cpp:390
IOReg< HWPort > pin_reg
Definition: hwport.h:84
IOSpecialReg * mcucr_reg
MCUCR IO register.
Definition: attiny2313.h:58
IOReg< HWTimer8_2C > tccra_reg
control register A
Definition: hwtimer.h:439
IOReg< HWTimer16 > icr_h_reg
input capture register, high byte
Definition: hwtimer.h:318
Timer unit with 16Bit counter and 2 output compare units, but 3 config registers. ...
Definition: hwtimer.h:593
TraceValueCoreRegister coreTraceGroup
Definition: avrdevice.h:108
IOReg< HWUart > ucsrb_reg
Definition: hwuart.h:136
IOReg< HWTimer16 > icr_l_reg
input capture register, low byte
Definition: hwtimer.h:319
TimerIRQRegister * timer01irq
timer interrupt unit for timer 0 and 1
Definition: attiny2313.h:67
bool flagMULInstructions
(F)MULxx instructions are available
Definition: avrdevice.h:121
IOReg< HWEeprom > eearh_reg
Definition: hweeprom.h:101
IOReg< HWTimer16 > tcnt_l_reg
counter register, low byte
Definition: hwtimer.h:311
HWTimer8_2C * timer0
timer 0 unit
Definition: attiny2313.h:65
Pin * GetPin(const char *name)
Definition: avrdevice.cpp:76
IOReg< HWTimer16 > ocrb_l_reg
output compare B register, low byte
Definition: hwtimer.h:315
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
Definition: timerirq.h:61
IOSpecialReg * pcmsk_reg
PCMSK IO register.
Definition: attiny2313.h:59
IOReg< HWEeprom > eecr_reg
Definition: hweeprom.h:101
HWEeprom * eeprom
Definition: avrdevice.h:102
IOSpecialReg * eifr_reg
EIFR IO register.
Definition: attiny2313.h:57
void registerLine(int idx, IRQLine *irq)
Definition: timerirq.cpp:88
#define AVR_REGISTER(name, class)
Definition: avrfactory.h:69
RWMemoryMember ** rw
The whole memory: R0-R31, IO, Internal RAM.
Definition: avrdevice.h:129
IOReg< HWUSI > usisr_reg
Definition: hwusi.h:168
HWTimer16_2C3 * timer1
timer 1 unit
Definition: attiny2313.h:66
IOSpecialReg * gimsk_reg
GIMSK IO register.
Definition: attiny2313.h:56
IOReg< HWUSI > usidr_reg
Definition: hwusi.h:168
ExternalIRQHandler * extirq
external interrupt support
Definition: attiny2313.h:55
oscillator version 4.x, 7bit, one range
Definition: rwmem.h:180
HWAcomp * acomp
analog compare unit
Definition: attiny2313.h:69
Provides the programming engine for flash self programming.
Definition: flashprog.h:38
IOReg< HWTimer16 > ocrb_h_reg
output compare B register, high byte
Definition: hwtimer.h:314
IOReg< HWTimer16_2C3 > tccrc_reg
control register C
Definition: hwtimer.h:617
IOReg< HWEeprom > eearl_reg
Definition: hweeprom.h:101
IOReg< HWTimer8 > ocra_reg
output compare A register
Definition: hwtimer.h:230
HWStack * stack
Definition: avrdevice.h:131
Class, which provides input capture source for 16bit timers.
Definition: icapturesrc.h:34
RWSreg * statusRegister
the memory interface for status
Definition: avrdevice.h:133
IOReg< HWUart > udr_reg
Definition: hwuart.h:136
Timer unit with 8Bit counter and 2 output compare unit.
Definition: hwtimer.h:416
Pin-change interrupt on all pins of a port.
Definition: externalirq.h:137
IRQLine * getLine(const std::string &name)
Definition: timerirq.cpp:109
HWPort portb
port B
Definition: attiny2313.h:45
HWPort porta
port A (only 3 bit)
Definition: attiny2313.h:44
HWUSI * usi
usi unit
Definition: attiny2313.h:70
FlashProgramming * spmRegister
Definition: avrdevice.h:99
IOReg< HWTimer8 > ocrb_reg
output compare B register
Definition: hwtimer.h:231
IOReg< HWPort > ddr_reg
Definition: hwport.h:84
IOReg< HWUsart > ucsrc_reg
Definition: hwuart.h:173
IOSpecialReg timsk_reg
the TIMSKx register
Definition: timerirq.h:73
Analog comparator peripheral.
Definition: hwacomp.h:42
IOReg< FlashProgramming > spmcr_reg
Definition: flashprog.h:95
Implement OSCCAL register.
Definition: rwmem.h:174
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.
Definition: externalirq.h:110