simulavr  1.1.0
atmega8.cpp
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1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License as published by
4  * the Free Software Foundation; either version 2 of the License, or
5  * (at your option) any later version.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10  * GNU Library General Public License for more details.
11  *
12  * You should have received a copy of the GNU General Public License
13  * along with this program; if not, write to the Free Software
14  * Foundation, Inc., 51 Franklin Street, Fifth Floor Boston, MA 02110-1301, USA
15  *
16  * atmega8.cpp
17  *
18  * Created on: 15.10.2010
19  * Author: ivica
20  */
21 
22 #include "atmega8.h"
23 
24 #include "hardware.h"
25 #include "irqsystem.h"
26 #include "hwport.h"
27 #include "hwstack.h"
28 #include "hwspi.h"
29 #include "hweeprom.h"
30 #include "hwwado.h"
31 #include "hwsreg.h"
32 #include "flashprog.h"
33 
34 #include "avrfactory.h"
35 
37 
39  AvrDevice(64, // I/O space above General Purpose Registers
40  1024, // RAM size
41  0, // External RAM size
42  8 * 1024), // Flash Size
43  adc6(),
44  adc7(),
45  portb(this, "B"),
46  portc(this, "C", false, 7),
47  portd(this, "D"),
48  assr_reg(&coreTraceGroup, "ASSR"),
49  sfior_reg(&coreTraceGroup, "SFIOR"),
50  prescaler01(this, "01", &sfior_reg, 0),
51  prescaler2(this, "2", PinAtPort(&portb, 6), &assr_reg, 3, &sfior_reg, 1),
52  premux0(&prescaler01, PinAtPort(&portd, 4)),
53  premux1(&prescaler01, PinAtPort(&portd, 5)),
54  premux2(&prescaler2)
55 {
56  fuses->SetFuseConfiguration(16, 0xd9e1);
57  fuses->SetBootloaderConfig(0xc00, 0x400, 9, 8);
58  irqSystem = new HWIrqSystem(this, 2, 19); //2 bytes per vector, 19 vectors
59  eeprom = new HWEeprom(this, irqSystem, 512, 15);
60  stack = new HWStackSram(this, 11); // Stack Pointer data space used 11 Bit wide.
61  osccal_reg = new OSCCALRegister(this, &coreTraceGroup, OSCCALRegister::OSCCAL_V3);
62 
63  spmRegister = new FlashProgramming(this,
64  32, // 32 words per page * 2 bytes per page * 128 pages = 8192 Bytes
65  0xC00, // No Read-While-Write section starts at 0xC00
67 
68  admux = new HWAdmuxM8(this, &portc.GetPin(0), // ADC0
69  &portc.GetPin(1), // ADC1
70  &portc.GetPin(2), // ADC2
71  &portc.GetPin(3), // ADC3
72  &portc.GetPin(4), // ADC4
73  &portc.GetPin(5), // ADC5
74  &adc6, // ADC6 only TQFP version
75  &adc7); // ADC7 only TQFP version
76 
77  aref = new HWARef4(this, HWARef4::REFTYPE_NOBG);
78 
79  ad = new HWAd(this, HWAd::AD_M8, irqSystem, 14, admux, aref); // Interrupt Vector ADC Conversion Complete
80 
81  spi = new HWSpi(this,
82  irqSystem,
83  PinAtPort(&portb, 3), // MOSI
84  PinAtPort(&portb, 4), // MISO
85  PinAtPort(&portb, 5), // SCK
86  PinAtPort(&portb, 2), // SS
87  10, // Interrupt Vector Serial Transfer Complete
88  true);
89 
90  gicr_reg = new IOSpecialReg(&coreTraceGroup,
91  "GICR");
92 
93  gifr_reg = new IOSpecialReg(&coreTraceGroup,
94  "GIFR");
95 
96  mcucr_reg = new IOSpecialReg(&coreTraceGroup,
97  "MCUCR");
98 
99  mcucsr_reg = new IOSpecialReg(&coreTraceGroup,
100  "MCUCSR");
101 
102  extirq = new ExternalIRQHandler(this,
103  irqSystem,
104  gicr_reg,
105  gifr_reg);
106 
107  extirq->registerIrq(1, // INT0 External Interrupt Request 0
108  6, // GICR Bit 6 - INT0: External Interrupt Request 0 Enable
109  new ExternalIRQSingle(mcucr_reg,0, 2, GetPin("D2"))); // INT0
110 
111  extirq->registerIrq(2, // INT1 External Interrupt Request 1
112  7, // GICR Bit 7 - INT1: External Interrupt Request 1 Enable
113  new ExternalIRQSingle(mcucr_reg, 2, 2, GetPin("D3"))); // INT1
114 
115  wado = new HWWado(this);
116 
117  usart = new HWUsart(this,
118  irqSystem,
119  PinAtPort(&portd, 1), // TX
120  PinAtPort(&portd, 0), // RX
121  PinAtPort(&portd, 4), // XCK
122  11, // USART, RX Complete
123  12, // USART Data Register Empty
124  13); // USART, TX Complete
125 
126  timer012irq = new TimerIRQRegister(this, irqSystem);
127  timer012irq->registerLine(0, IRQLine("TOV0", 9));
128  timer012irq->registerLine(2, IRQLine("TOV1", 8));
129  timer012irq->registerLine(3, IRQLine("OCF1B", 7));
130  timer012irq->registerLine(4, IRQLine("OCF1A", 6));
131  timer012irq->registerLine(5, IRQLine("ICF1", 5));
132  timer012irq->registerLine(6, IRQLine("TOV2", 4));
133  timer012irq->registerLine(7, IRQLine("OCF2", 3));
134 
135  timer0 = new HWTimer8_0C(this,
136  &premux0,
137  0,
138  timer012irq->getLine("TOV0"));
139 
140  inputCapture1 = new ICaptureSource(PinAtPort(&portb, 0)); // ICP1
141 
142  timer1 = new HWTimer16_2C2(this,
143  &premux1,
144  1,
145  timer012irq->getLine("TOV1"),
146  timer012irq->getLine("OCF1A"),
147  PinAtPort(&portb, 1), // OC1A
148  timer012irq->getLine("OCF1B"),
149  PinAtPort(&portb, 2), // OC1B
150  timer012irq->getLine("ICF1"),
151  inputCapture1, false);
152 
153  timer2 = new HWTimer8_1C(this,
154  &premux2,
155  2,
156  timer012irq->getLine("TOV2"),
157  timer012irq->getLine("OCF2"),
158  PinAtPort(&portb, 3)); // OC2
159 
160  acomp = new HWAcomp(this, irqSystem, PinAtPort(&portd, 6), PinAtPort(&portd, 7), 16, ad, timer1, &sfior_reg);
161 
162  rw[0x5f] = statusRegister;
163  rw[0x5e] = &((HWStackSram *)stack)->sph_reg;
164  rw[0x5d] = &((HWStackSram *)stack)->spl_reg;
165 // rw[0x5c] Reserved
166  rw[0x5b] = gicr_reg;
167  rw[0x5a] = gifr_reg;
168  rw[0x59] = &timer012irq->timsk_reg;
169  rw[0x58] = &timer012irq->tifr_reg;
170  rw[0x57] = &spmRegister->spmcr_reg;
171 // rw[0x56] TWCR
172  rw[0x55] = mcucr_reg;
173  rw[0x54] = mcucsr_reg;
174  rw[0x53] = &timer0->tccr_reg;
175  rw[0x52] = &timer0->tcnt_reg;
176  rw[0x51] = osccal_reg;
177  rw[0x50] = &sfior_reg;
178  rw[0x4f] = &timer1->tccra_reg;
179  rw[0x4e] = &timer1->tccrb_reg;
180  rw[0x4d] = &timer1->tcnt_h_reg;
181  rw[0x4c] = &timer1->tcnt_l_reg;
182  rw[0x4b] = &timer1->ocra_h_reg;
183  rw[0x4a] = &timer1->ocra_l_reg;
184  rw[0x49] = &timer1->ocrb_h_reg;
185  rw[0x48] = &timer1->ocrb_l_reg;
186  rw[0x47] = &timer1->icr_h_reg;
187  rw[0x46] = &timer1->icr_l_reg;
188  rw[0x45] = &timer2->tccr_reg;
189  rw[0x44] = &timer2->tcnt_reg;
190  rw[0x43] = &timer2->ocra_reg;
191  rw[0x42] = &assr_reg;
192  rw[0x41] = &wado->wdtcr_reg;
193  rw[0x40] = &usart->ucsrc_ubrrh_reg;
194  rw[0x3f] = &eeprom->eearh_reg;
195  rw[0x3e] = &eeprom->eearl_reg;
196  rw[0x3d] = &eeprom->eedr_reg;
197  rw[0x3c] = &eeprom->eecr_reg;
198 // rw[0x3b] Reserved
199 // rw[0x3a] Reserved
200 // rw[0x39] Reserved
201  rw[0x38] = &portb.port_reg;
202  rw[0x37] = &portb.ddr_reg;
203  rw[0x36] = &portb.pin_reg;
204  rw[0x35] = &portc.port_reg;
205  rw[0x34] = &portc.ddr_reg;
206  rw[0x33] = &portc.pin_reg;
207  rw[0x32] = &portd.port_reg;
208  rw[0x31] = &portd.ddr_reg;
209  rw[0x30] = &portd.pin_reg;
210  rw[0x2f] = &spi->spdr_reg;
211  rw[0x2e] = &spi->spsr_reg;
212  rw[0x2d] = &spi->spcr_reg;
213  rw[0x2c] = &usart->udr_reg;
214  rw[0x2b] = &usart->ucsra_reg;
215  rw[0x2a] = &usart->ucsrb_reg;
216  rw[0x29] = &usart->ubrr_reg;
217  rw[0x28] = &acomp->acsr_reg;
218  rw[0x27] = &ad->admux_reg;
219  rw[0x26] = &ad->adcsra_reg;
220  rw[0x25] = &ad->adch_reg;
221  rw[0x24] = &ad->adcl_reg;
222 // rw[0x23] TWDR
223 // rw[0x22] TWAR
224 // rw[0x21] TWSR
225 // rw[0x20] TWBR
226 
227  Reset();
228 }
229 
231  delete acomp;
232  delete timer2;
233  delete timer1;
234  delete inputCapture1;
235  delete timer0;
236  delete timer012irq;
237  delete usart;
238  delete wado;
239  delete extirq;
240  delete mcucsr_reg;
241  delete mcucr_reg;
242  delete gifr_reg;
243  delete gicr_reg;
244  delete spi;
245  delete ad;
246  delete aref;
247  delete admux;
248  delete spmRegister;
249  delete osccal_reg;
250  delete stack;
251  delete eeprom;
252  delete irqSystem;
253 }
oscillator version 3.x and older, 8bit, one range
Definition: rwmem.h:179
ADC reference is selected on 3 or 4 different sources: Vcc, aref pin, bandgap or 2.56V reference.
Definition: hwad.h:60
Basic AVR device, contains the core functionality.
Definition: avrdevice.h:66
0:aref, 1:vcc, 2:-, 3:2.56V
Definition: hwad.h:67
IOSpecialReg * gicr_reg
GICR IO register.
Definition: atmega8.h:48
HWAcomp * acomp
analog compare unit
Definition: atmega8.h:57
HWIrqSystem * irqSystem
Definition: avrdevice.h:104
Implements a stack with stack register using RAM as stackarea.
Definition: hwstack.h:131
HWSpi * spi
SPI unit.
Definition: atmega8.h:71
Timer unit with 8Bit counter and one output compare unit.
Definition: hwtimer.h:377
Definition: hwwado.h:38
Handler for external IRQ's to communicate with IRQ system and mask/flag registers.
Definition: externalirq.h:41
Represents a timer interrupt line, Frontend for timer interrupts.
Definition: timerirq.h:42
IOSpecialReg * mcucsr_reg
MCUCSR IO register.
Definition: atmega8.h:51
Implements the I/O hardware necessary to do USART transfers.
Definition: hwuart.h:149
HWTimer16_2C2 * timer1
timer 1 unit
Definition: atmega8.h:68
HWTimer8_0C * timer0
timer 0 unit
Definition: atmega8.h:67
ADC type M8: ADC on atmega8.
Definition: hwad.h:259
OSCCALRegister * osccal_reg
OSCCAL IO register.
Definition: atmega8.h:52
IOSpecialReg * gifr_reg
GIFR IO register.
Definition: atmega8.h:49
Timer unit with 16Bit counter and 2 output compare units and 2 config registers.
Definition: hwtimer.h:528
virtual ~AvrDevice_atmega8()
Definition: atmega8.cpp:230
IOSpecialReg * mcucr_reg
MCUCR IO register.
Definition: atmega8.h:50
HWUsart * usart
USART unit.
Definition: atmega8.h:72
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
Definition: timerirq.h:61
HWEeprom * eeprom
Definition: avrdevice.h:102
Definition: hwspi.h:38
HWAdmux * admux
ADC multiplexer unit.
Definition: atmega8.h:54
HWTimer8_1C * timer2
timer 2 unit
Definition: atmega8.h:69
#define AVR_REGISTER(name, class)
Definition: avrfactory.h:69
TimerIRQRegister * timer012irq
timer interrupt unit for timer 0 to 2
Definition: atmega8.h:70
HWARef * aref
ADC reference unit.
Definition: atmega8.h:55
ExternalIRQHandler * extirq
external interrupt support
Definition: atmega8.h:47
Timer unit with 8Bit counter and no output compare unit.
Definition: hwtimer.h:347
AVRDevice class for ATMega8.
Definition: atmega8.h:39
Provides the programming engine for flash self programming.
Definition: flashprog.h:38
ICaptureSource * inputCapture1
input capture source for timer1
Definition: atmega8.h:66
HWStack * stack
Definition: avrdevice.h:131
HWAd * ad
ADC unit.
Definition: atmega8.h:56
Class, which provides input capture source for 16bit timers.
Definition: icapturesrc.h:34
HWWado * wado
WDT timer.
Definition: avrdevice.h:134
Definition: hwad.h:204
FlashProgramming * spmRegister
Definition: avrdevice.h:99
Analog comparator peripheral.
Definition: hwacomp.h:42
Implement OSCCAL register.
Definition: rwmem.h:174
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.
Definition: externalirq.h:110